Renesas Electronics /R7FA6M1AD /GPT328 /GTUPSR

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Interpret as GTUPSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)USGTRGAR 0 (0)USGTRGAF 0 (0)USGTRGBR 0 (0)USGTRGBF 0 (0)USGTRGCR 0 (0)USGTRGCF 0 (0)USGTRGDR 0 (0)USGTRGDF 0 (0)USCARBL 0 (0)USCARBH 0 (0)USCAFBL 0 (0)USCAFBH 0 (0)USCBRAL 0 (0)USCBRAH 0 (0)USCBFAL 0 (0)USCBFAH 0 (0)USELCA 0 (0)USELCB 0 (0)USELCC 0 (0)USELCD 0 (0)USELCE 0 (0)USELCF 0 (0)USELCG 0 (0)USELCH 0Reserved

USCBFAH=0, USGTRGAR=0, USCAFBL=0, USELCE=0, USELCC=0, USCAFBH=0, USELCB=0, USCBRAL=0, USGTRGDF=0, USGTRGCF=0, USGTRGDR=0, USELCF=0, USGTRGCR=0, USCARBH=0, USGTRGBF=0, USELCA=0, USELCD=0, USCBFAL=0, USGTRGAF=0, USGTRGBR=0, USELCH=0, USELCG=0, USCBRAH=0, USCARBL=0

Description

General PWM Timer Up Count Source Select Register

Fields

USGTRGAR

GTETRGA Pin Rising Input Source Counter Count Up Enable

0 (0): Disable counter count up on the rising edge of GTETRGA input

1 (1): Enable counter count up on the rising edge of GTETRGA input

USGTRGAF

GTETRGA Pin Falling Input Source Counter Count Up Enable

0 (0): Disable counter count up on the falling edge of GTETRGA input

1 (1): Enable counter count up on the falling edge of GTETRGA input.

USGTRGBR

GTETRGB Pin Rising Input Source Counter Count Up Enable

0 (0): Disable counter count up on the rising edge of GTETRGB input

1 (1): Enable counter count up on the rising edge of GTETRGB input.

USGTRGBF

GTETRGB Pin Falling Input Source Counter Count Up Enable

0 (0): Disable counter count up on the falling edge of GTETRGB input

1 (1): Enable counter count up on the falling edge of GTETRGB input.

USGTRGCR

GTETRGC Pin Rising Input Source Counter Count Up Enable

0 (0): Disable counter count up on the rising edge of GTETRGC input

1 (1): Enable counter count up on the rising edge of GTETRGC input

USGTRGCF

GTETRGC Pin Falling Input Source Counter Count Up Enable

0 (0): Disable counter count up on the falling edge of GTETRGC input

1 (1): Enable counter count up on the falling edge of GTETRGC input.

USGTRGDR

GTETRGD Pin Rising Input Source Counter Count Up Enable

0 (0): Disable counter count up on the rising edge of GTETRGD input

1 (1): Enable counter count up on the rising edge of GTETRGD input

USGTRGDF

GTETRGD Pin Falling Input Source Counter Count Up Enable

0 (0): Disable counter count up on the falling edge of GTETRGD input

1 (1): Enable counter count up on the falling edge of GTETRGD input.

USCARBL

GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable

0 (0): Disable counter count up on the rising edge of GTIOCA input when GTIOCB input is 0

1 (1): Enable counter count up on the rising edge of GTIOCA input when GTIOCB input is 0.

USCARBH

GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable

0 (0): Disable counter count up on the rising edge of GTIOCA input when GTIOCB input is 1

1 (1): Enable counter count up on the rising edge of GTIOCA input when GTIOCB input is 1.

USCAFBL

GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable

0 (0): Disable counter count up on the falling edge of GTIOCA input when GTIOCB input is 0

1 (1): Enable counter count up on the falling edge of GTIOCA input when GTIOCB input is 0.

USCAFBH

GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable

0 (0): Disable counter count up on the falling edge of GTIOCA input when GTIOCB input is 1

1 (1): Enable counter count up on the falling edge of GTIOCA input when GTIOCB input is 1.

USCBRAL

GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable

0 (0): Disable counter count up on the rising edge of GTIOCB input when GTIOCA input is 0

1 (1): Enable counter count up on the rising edge of GTIOCB input when GTIOCA input is 0.

USCBRAH

GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable

0 (0): Disable counter count up on the rising edge of GTIOCB input when GTIOCA input is 1

1 (1): Enable counter count up on the rising edge of GTIOCB input when GTIOCA input is 1.

USCBFAL

GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable

0 (0): Disable counter count up on the falling edge of GTIOCB input when GTIOCA input is 0

1 (1): Enable counter count up on the falling edge of GTIOCB input when GTIOCA input is 0.

USCBFAH

GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable

0 (0): Disable counter count up on the falling edge of GTIOCB input when GTIOCA input is 1

1 (1): Enable counter count up on the falling edge of GTIOCB input when GTIOCA input is 1.

USELCA

ELC_GPTA Event Source Counter Count Up Enable

0 (0): Disable counter count up on ELC_GPTA input

1 (1): Enable counter count up on ELC_GPTA input.

USELCB

ELC_GPTB Event Source Counter Count Up Enable

0 (0): Disable counter count up on ELC_GPTB input

1 (1): Enable counter count up on ELC_GPTB input.

USELCC

ELC_GPTC Event Source Counter Count Up Enable

0 (0): Disable counter count up on ELC_GPTC input

1 (1): Enable counter count up on ELC_GPTC input.

USELCD

ELC_GPTD Event Source Counter Count Up Enable

0 (0): Disable counter count up on ELC_GPTD input

1 (1): Enable counter count up on ELC_GPTD input

USELCE

ELC_GPTE Event Source Counter Count Up Enable

0 (0): Disable counter count up on ELC_GPTE input

1 (1): Enable counter count up on ELC_GPTE input.put

USELCF

ELC_GPTF Event Source Counter Count Up Enable

0 (0): Disable counter count up on ELC_GPTF input

1 (1): Enable counter count up on ELC_GPTF input.

USELCG

ELC_GPTG Event Source Counter Count Up Enable

0 (0): Disable counter count up on ELC_GPTG input

1 (1): Enable counter count up on ELC_GPTG input.

USELCH

ELC_GPTH Event Source Counter Count Up Enable

0 (0): Disable counter count up on ELC_GPTH input

1 (1): Enable counter count up on ELC_GPTH input.

Reserved

These bits are read as 00000000. The write value should be 00000000.

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